Although the present invention is described below with regard to a motor vehicle application, it can be applied, in principle, to any field of use of power semiconductors. In the development of new generations of power transistors, for example in DMOS technology, great value is placed on reducing the on resistivity RON·A. As a result of this, the ratio of the channel width w to the area of the DMOS structure is continually increased with the aid of shrinks. It follows from this that, given a channel length l kept predominantly constant, the ratio of the channel width w to the channel length l also increases significantly per unit area.
In automotive applications, in particular, the so-called load dump case plays an important part in the specification of the component requirements. Said load dump occurs when the connection to the automobile battery fails in the motor vehicle. The charging current provided by the generator continues to flow for a certain time and has to be absorbed or taken up by the automobile electronics until a control responds and switches off the charging current from the generator of the motor vehicle. In this time, however, a load current stabilized to a typical current density of, for example, 50 A/cm2 by means of load resistors flows away via a switching device or a transistor, illustrated in FIG. 4. To that end, the transistor is preferably provided with a zener diode 13 between the gate terminal 16 and the drain terminal 11. In accordance with FIG. 4, in a load dump case, a generator (not illustrated) firstly builds up a high reverse voltage at the transistor, the built-in zener diode 13 becoming electrically conductive when its zener voltage is exceeded, so that a further increase in the reverse voltage activates the gate 16, i.e. current can flow through the transistor from the source 17 to the drain 11 or vice-versa, depending on the conduction type of the semiconductor switching device.
This current driven by the generator has to be carried by the transistor at high voltage U (e.g. 40 V) for some time (e.g. about 100 ms) and greatly heats said transistor in the process. A homogeneous distribution of the current in the semiconductor material of the transistor turns out to be advantageous in this case. However, primarily MOS transistors with a large ratio between the channel width w and the channel length l per unit area exhibit the tendency toward splitting, i.e. the current is only accepted in a few individual regions of the channel width w present, the remaining regions of the semiconductor material outputting the current, which results in local self-heating. The fact of whether or not splitting of the current or the formation of so-called hot spots in the semiconductor material occurs essentially depends on the thermal resistance, the applied drain-source voltage and the current density at the temperature-stable point. If the condition for splitting is set at Rth·U·j0>3·T0, the area-specific thermal resistance Rth and the voltage U determined by the zener voltage being defined and the current density j0 essentially resulting from the ratio of the channel width w to the channel length l and T0 specifying the heat sink temperature (absolute temperature scale), then a large ratio of the channel width w to the channel length l results in a large j0 and hence the fulfilling of the condition for splitting.
Such splitting then leads to a further large local temperature increase in the few individual semiconductor regions, if appropriate up to melting and thus destruction of the transistor. Consequently, it is problematic to provide a large ratio of the channel width w to the channel length l per unit area for the purpose of realizing a low on resistivity RON·A in a transistor which at the same time is intended to have a good load dump strength. In the case of trench transistors, in particular, it is possible to realize very high channel width to channel length ratios per unit area, with the result that current splitting can occur to an intensified extent in such a case.
U.S. Pat. No. 5,095,343 describes a vertically diffused power MOSFET structure with an improved safe operating area (SOA), in which, by cutting out the source regions in part of the body region, the channel width is reduced and the robustness of the components is thus increased.
The published American patent application US 2002/0020873 describes a MOSFET device having an asymmetrical MOS channel for providing different gate threshold voltage characteristics in different sections of the device. In this case, a device with different MOS channel threshold voltages in different sections of the transistor was provided in order to increase the component strength (electrical) even in the case of the application of transistors in linear amplifiers.
However, both solutions lead to an increased on resistance of the transistor in comparison with a conventional transistor with the same threshold voltage.
The German patent specification DE 100 01 876 describes a power transistor with an overvoltage protection circuit for avoiding a current path from the active zenering (zener diode between drain and gate of a semiconductor section) to the gate driving, the device having two transistors. What is problematic with this solution approach is that only one of the transistors contributes to the current flow during normal operation and a non-minimum on resistance is thus ensured. Furthermore, the gate which lies lies [sic] with the active zenering (zener diode between gate and drain terminals of the transistor) at a non-defined potential which is established by reverse currents and capacitive couplings, which results in a behavior that is difficult to control, for example on account of a temperature increase or rapid changes in the drain-source voltage.